yosys: enable tests

This commit is contained in:
Emily 2019-09-27 15:06:42 +01:00 committed by Austin Seipp
parent b819ce615d
commit 26d26f77a6

View file

@ -2,6 +2,7 @@
, pkgconfig, bison, flex
, tcl, readline, libffi, python3
, protobuf, zlib
, verilog
}:
with builtins;
@ -49,6 +50,7 @@ stdenv.mkDerivation rec {
--replace 'LD = gcc' 'LD = $(CXX)' \
--replace 'ABCMKARGS = CC="$(CXX)" CXX="$(CXX)"' 'ABCMKARGS =' \
--replace 'echo UNKNOWN' 'echo ${substring 0 10 (elemAt srcs 0).rev}'
patchShebangs tests
'';
preBuild = ''
@ -62,6 +64,13 @@ stdenv.mkDerivation rec {
(cd misc && ${protobuf}/bin/protoc --cpp_out ../backends/protobuf/ ./yosys.proto)
'';
doCheck = true;
checkInputs = [ verilog ];
# checkPhase defaults to VERBOSE=y, which gets passed down to abc,
# which then does $(VERBOSE)gcc, which then complains about not
# being able to find ygcc. Life is pain.
checkFlags = [ " " ];
meta = {
description = "Framework for RTL synthesis tools";
longDescription = ''